Serial Giga Media Independent Interface (SGMII)

The serial gigabit media-independent interface (SGMII) is a variant of MII used for Gigabit Ethernet but can also carry 10/100 Mbit/s Ethernet. It uses differential pairs at 625 MHz clock frequency DDR for TX and RX data and TX and RX clocks. It differs from GMII by its low-power and low pin-count 8b/10b-coded SerDes. Transmit and receive path each use one differential pair for data and another differential pair for clock. The TX/RX clocks must be generated on device output but are optional on device input (clock recovery may be used alternatively). 10/100 Mbit/s Ethernet is carried by duplicating data words 100/10 times each, so the clock is always at 625 MHz.

Protocol Analyzer

BF7264 Pro with SGMII option

BF7264 Pro Specifications PDF MIPI D-PHY Solution PDF

SGMII command trigger- PCS Trigger

SGMII command trigger- GMII Data Trigger

SGMII(PHY) & GMII(MAC) packet analysis data are displayed simultaneously in the report table. The report also contains statistics on packets.

Save as TXT/CSV In Protocol Analyzer mode, click the icon above the report area to save the decoded data as a TXT/CSV file.

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