LVDS POD

⚠️ Note : La série d'analyseurs logiques LA3000+ est épuisée et officiellement abandonnée. Conscients de l'importance de cet outil dans votre travail, nous nous engageons à faciliter une transition en douceur.

📢 Nous sommes ravis de vous présenter la série LA4000 en tant que remplacement, bientôt disponible sur notre site web pour votre commodité.

Modèle	Canaux	Déclencheurs de bus	Analyse du protocole
LA3068E+	68	I	I
LA3068B+	68	I, II	I, II
LA3136E+	136	I	I
LA3136B+	136	I, II	I, II

Déclencheurs de bus I : I²C, MIPI I3C 1.1, SPI, UART (RS232), USB PD3.0

Déclencheurs de bus II : eMMC5.1, eSPI, I²S, NAND Flash, SD3.0, Serial Flash, SVID, ...

Analyse de protocole I : I²C, MIPI I3C 1.1, SPI, UART (RS232), USB PD3.0

Analyse de protocole II : CAN 2.0B/CAN-FD, BiSS-C, DALI, eSPI, I²S, LIN2.2, MDIO, PWM, SVID, ...

Décodage de bus : CAN 2.0B/CAN-FD, DP_Aux, eMMC 5.1, I²C, MIPI I3C 1.1, Profibus, SD 3.0, SPI,SVID, SWD, UART (RS232), USB1.1, USB PD 3.0... 100+

Logic Analyzer (LA) Mode

• Capture digital waveforms and support bus decodes. Able to stack with a DSO to form as an MSO.

•  Provides multiple storage modes, users could select to have long time recording or precision acquisition.

•  Long Time Record: Transitional Storage VS Compressed Storage

For signal capture and analysis, usually require to record the signal for a long time. If the data is stored in a compressed way, it will cause your software to lag or even stop functioning when decompressing the data after it is sent back to the computer. Because PC memory size might insufficient for decompressed data size. To satisfy the requirement of smooth software operation and long-term recording without missing any data, the storage method adopted by the Acute analyzer is transitional storage rather than compression. After returning to the PC software, it doesn"t need to do the decompression. The decoded results can be displayed while the analysis is finished.

Parallel Clause Triggers
16-States parallel IF Clause settings for 128/64 channel value compare combined with AND/OR logic condition and 4 Timer/Counter conditions.

 

Flow chart bus triggers

Power trigger for serial bus, 8-states flow chart setting with Counter/Timer

Detail parameters for each states

Protocol Analyzer (PA) Mode
It is hardware decoding, may log protocol data very long time if without waveforms. Application timing: Preliminary protocol debug.

Protocol Analyzer	Protocol Logger	Protocol Monitor
Show real-time protocol data. Application timing: massive protocol data with some idles in between.	Like data logger, save massive data into SSD hard drive. Application timing: massive protocol data.	Like dash cameras, record protocol data by the device’s memory only. Application timing: trigger event only happens in very long time.