MSO3124B

Model	Channels	Record Length/ch (Analog / Digital)	Vertical Resolution (Analog)	Trigger (Analog / Digital)	Electrical Validation (Protocol)
MSO3124E	4	128 / 256 Mpts	8 bits	Group I / I	---
MSO3124B	4	128 / 256 Mpts	8 bits	Group I, II, Bus I / I, II	---
MSO3124H	4	128 / 256 Mpts	16 bits	Group I, II, Bus I / I, II, III	---
MSO3124V	4	128 / 256 Mpts	16 bits	Group I, II, Bus I, II / I, II, III	I2C, I3C, SPI, UART,...

Analog : 4CH, 1 GS/s S/R, 200 MHz bandwidth
Group I : Edge, Either, External, Falling, Rising, Video, Width
Group II: Runt, Pattern/ State, Timeout, Transition, Setup/ Hold, B-Trigger, B-Event, Window
Bus I : BiSS-C, CAN 2.0B/CAN FD, DALI, DP_Aux^[1], I2C, I2S, LIN2.2, Modbus, Profibus, SENT, SPI, SVI2, UART UART(RS232), USB1.1, ...
Bus II : SVI3^[2], SVID^{[3]
[1] Optional DP_Aux adapter needed.
[2] Upon request by user who is approved by AMD. SVI3 Bus Trigger / Decode are supported ONLY by MSO3124V.
[3] Upon request by user who has signed CNDA with Intel. SVID Bus Trigger / Decode are supported ONLY by MSO3124V.}

Digital : 16CH, 2 GS/s Timing Analysis, 250 MHz State Analysis
Bus Trigger I：CAN2.0B/CAN FD, HID over I2C, I2C, I2S, LIN2.2, MIPI I3C 1.1, SENT, SPI, UART, USB PD 3.1, ...
Bus Trigger II：DALI, LPC, MDIO, Mini/Micro LED, MIPI RFFE 3, MIPI SPMI 2, PMBus, Profibus, SMBus, SVI2, ...
Bus Trigger III：eMMC 4.5, eSPI, MII, RGMII, RMII, SD 3.0 (SDIO 2.0), Serial Flash (SPI NAND), SVI3^[2], SVID^[3]
Protocol Analyzer I：CAN2.0B/CAN FD, HID over I2C, I2C, I2S, LIN2.2, MIPI I3C 1.1, SENT, SPI, UART, USB PD 3.1, ...
Protocol Analyzer II：DALI, MDIO, Mini/Micro LED, MIPI RFFE 3, Modbus, PMBus, Profibus, SMBus, USB1.1
Protocol Analyzer III：eSPI, MII, RGMII, RMII, SVI3^[2], SVID^[3]
Bus Decode：CAN 2.0B/CAN FD, DP_Aux^[1], eSPI, I²C, I²S, MII, MIPI I3C 1.1, MIPI RFFE 3, MIPI SoundWire, SPI, SPI Flash, SVI3^[2], SVID^[3], UART, USB PD 3.1, ...(100+)
^{[1] Optional DP_Aux adapter needed.
[2] Upon request ONLY by users who have been authorized by AMD, SVI3 trigger & PA & Bus Decode supported by MSO3124H/V ONLY.
[3] Upon request ONLY by users who have signed CNDA with Intel, SVID trigger & PA & Bus Decode supported by MSO3124H/V ONLY.}

Datasheet [PDF]

Logic Analyzer (LA) Mode

• MSO analog and digital channels can capture signals simultaneously.
  It can also stack an oscilloscope to compare digital and analog signals simultaneously, which is suitable for signal quality analysis.

  LA Storage Mode:
  Long Time Record: Transitional Storage VS Compressed Storage
  For signal capture and analysis, usually require to record the signal for a long time. If the data is stored in a compressed way, it will cause your software to lag or even stop functioning when decompressing the data after it is sent back to the computer. Because PC memory size might insufficient for decompressed data size. To satisfy the requirement of smooth software operation and long-term recording without missing any data, the storage method adopted by the Acute analyzer is transitional storage rather than compression. After returning to the PC software, it doesn't need to do the decompression. The decoded results can be displayed while the analysis is finished. 
  
  
  
  Software Main Window
  
  Analog & Digital waveform
  Auto Threshold Settings:
  1.
  2.
  3. 
  
  Trigger Settings Window
  
  Multiple Protocols Analysis Simultaneously:
  Ex: I^₂C + USB PD3.0
  
  
  MSO Stack With Other Vendors of Oscilloscope:
  (*Support DSO)
  
  MSO Enables Digital & Analog Channels (Using the same channels)
  Digital & Analog Signals From MSO and External DSO From Other Vendors*BUS_SMBUS: Decode & Digital Signals   *DSO: MSO Analog Signals   *Ext DSO: External DSO Signals
  
  Add Notes & Pictures in Waveform
  Power Management Protocols Solution for MSO
  Ex: PMBus(CH0 & CH1) & The Related Power Voltage(CH2) (*Digital CH0, CH1    Analog: CH2 )
  

Protocol Analyzer (PA) Mode
It is hardware decoding, may log protocol data very long time if without waveforms.
Application timing: Preliminary protocol debug.

PA Storage Mode:
Software Main Window: