SD UHS Protocol Support

Storage

SD/SDIO UHS-I/UHS-II

What is SD UHS?

SD UHS (Ultra High Speed) encompasses the UHS-I and UHS-II interface specifications for SD memory cards, offering significantly faster data transfer rates than legacy SD modes. UHS-I operates on the standard SD interface with a single row of pins, supporting SDR50 (50 MB/s), SDR104 (104 MB/s), and DDR50 (50 MB/s DDR) transfer modes at 1.8V signaling. UHS-II adds a second row of pins to the SD connector, providing two additional differential lanes (D0 and D1) for full-duplex communication at up to 312 MB/s per lane. The SD protocol uses a command-response architecture with CMD and DAT lines, where the host sends commands on the CMD line and the card responds, followed by data transfers on 1 or 4 DAT lines. SD UHS interfaces are found in cameras, drones, single-board computers, automotive dashcams, medical imaging devices, and any application requiring high-speed removable storage. Protocol analysis for SD UHS is critical because the high-speed signaling, voltage switching (from 3.3V to 1.8V), and complex initialization sequences create numerous opportunities for compatibility and performance issues. Engineers need to verify the initialization handshake, speed mode negotiation, command-response timing, and sustained data throughput to ensure reliable card operation across different manufacturers and speed classes.

SD UHS Quick Reference

type Parallel / serial
signals CLK, CMD, DAT0-3
max Speed 104 MHz (UHS-I) / 312 MHz (UHS-II)
voltage Range 1.8V / 3.3V
bus Width 4-bit data bus

Acute Instruments Supporting SD UHS

Recommended Solutions

Recommended for Decode

TL4234B

TL4234B

With Analog Channels

MSO2116E

MSO2116E

All Supporting Products

Protocol Decode
Hardware Trigger
Protocol Exerciser

LA4000 Series

MSO2000 Series

MSO3000 Series

TravelLogic Series

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How to Analyze SD UHS with Acute Instruments

1

Connect your Acute logic analyzer to the SD interface signals: CLK, CMD, and DAT0-DAT3 (for 4-bit mode).

2

Attach a ground lead to the host board's ground reference.

3

In the Acute software, select the SD protocol decoder and assign each signal to the corresponding channel.

4

Configure the bus width (1-bit or 4-bit) and expected UHS speed mode (SDR12, SDR25, SDR50, SDR104, or DDR50).

5

Capture and decode SD transactions showing commands (CMD0-CMD63, ACMD), responses (R1, R2, R3, R6, R7), data blocks, and CRC status for read and write operations.

Frequently Asked Questions

What sample rate do I need for SD UHS-I analysis?
For SDR50 mode (100 MHz clock), sample at a minimum of 400 MHz. For SDR104 mode (208 MHz clock), use at least 500 MHz to 1 GHz sampling. DDR50 mode uses a 50 MHz clock but samples on both edges, requiring similar rates to SDR50. Acute instruments with 2 GHz timing analysis provide reliable capture for all UHS-I modes.
Why is my SD decoder failing during the initialization sequence?
SD card initialization involves a complex sequence of commands (CMD0, CMD8, ACMD41, CMD2, CMD3, CMD7) that must occur in the correct order with proper timing. Failures often occur during the voltage switch from 3.3V to 1.8V (CMD11). Ensure your logic analyzer threshold is set to match the active voltage level during each phase. Capture the full initialization from power-up to verify each step.
How many channels are needed for SD UHS analysis?
For 1-bit SD mode: 3 channels (CLK, CMD, DAT0). For 4-bit SD mode: 6 channels (CLK, CMD, DAT0-DAT3). If you need to monitor the card detect or write protect signals, add 1-2 more channels. UHS-II analysis requires additional channels for the differential D0 and D1 lanes.

Related Protocols

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