SVID Protocol Support

Power

Intel Serial Voltage Identification

What is SVID?

SVID (Serial Voltage Identification) is a proprietary serial interface developed by Intel for communication between Intel processors and voltage regulator modules (VRMs) on motherboards and computing platforms. SVID enables the processor to dynamically request specific voltage levels from the VRM, supporting Intel's power management features including SpeedStep, Turbo Boost, and various low-power states. The protocol uses three signal lines — SCLK, SDATA, and ALERT — operating at up to 26.25 MHz with a command-response architecture. The processor sends commands to set voltage (SetVID), request telemetry (GetReg), and configure VRM parameters, while the VRM responds with acknowledgments and data. Acute decoders cover SVID Rev 1.96, including IMVP7, IMVP8, IMVP9, VR12.0 through VR14, and PSys configurations. SVID is critical in all Intel-based desktop, laptop, and server platforms where the CPU core voltage must be precisely and dynamically controlled. Protocol analysis for SVID is essential for motherboard designers and VRM developers who need to verify that voltage transitions occur correctly and within specification timing, that telemetry readings are accurate, and that the VRM responds appropriately to all processor commands. Issues with SVID communication can cause system instability, blue screens, performance throttling, or hardware damage from incorrect voltage delivery. Debugging SVID requires decoding the fast serial transactions into readable command and response packets with voltage values.

SVID Quick Reference

type Serial, synchronous
signals SCLK, SDATA, ALERT (3 wires)
max Speed 26.25 MHz
voltage Range 1.0V – 1.1V
standard Intel SVID Rev 1.96 — IMVP7, IMVP8, IMVP9; VR12.0 through VR14; PSys

Important Notice

SVID protocol decoding is provided to end customers upon request, and only to users who have signed a Corporate Non-Disclosure Agreement (CNDA) with Intel.

Acute Instruments Supporting SVID

Recommended Solutions

Recommended for Decode

MSO3124H

MSO3124H

With Analog Channels

MSO3124H

MSO3124H

All Supporting Products

Protocol Decode
Hardware Trigger
Protocol Exerciser

LA4000 Series

MSO2000 Series

MSO3000 Series

TravelLogic Series

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How to Analyze SVID with Acute Instruments

1

Connect your Acute logic analyzer to the SCLK, SDATA, and ALERT lines on the motherboard or VRM module.

2

Attach a ground lead to a nearby ground reference point on the board.

3

In the Acute software, select the SVID protocol decoder and assign the clock, data, and alert channels.

4

Configure the SVID protocol version (Rev 1.96 covers IMVP7-9, VR12.0-VR14, PSys) and expected clock speed.

5

Capture and view decoded SVID transactions showing command types (SetVID, GetReg, SetRegAddr, etc.), VID codes with corresponding voltage values, and VRM response data.

Frequently Asked Questions

What sample rate do I need for SVID analysis?
SVID operates at clock speeds up to 26.25 MHz. For reliable decoding, use a sample rate of at least 100 MHz (approximately 4x the clock). A sample rate of 200 MHz or higher is recommended to clearly resolve the clock and data edge relationships and accurately decode command and response phases.
Why is my SVID decoder not recognizing commands?
SVID uses a specific framing protocol where the processor drives the data line during the command phase and releases it for the VRM to respond. If the decoder cannot identify frame boundaries, check that the SCLK signal is being captured cleanly and that the voltage threshold is appropriate (SVID signals operate at 1.0-1.1V). Also verify the SVID protocol version matches your platform — Acute supports Rev 1.96 covering IMVP7/8/9 and VR12.0 through VR14.
How many channels are needed for SVID?
SVID requires 3 channels — SCLK, SDATA, and ALERT. Intel platforms often have separate SVID buses for different power domains (CPU core, system agent, DRAM), so you may need 6-9 channels to monitor multiple SVID buses simultaneously. Adding channels for VR_READY signals can provide useful context.

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