PDM Protocol Support

Audio

Pulse Density Modulation

What is PDM?

PDM (Pulse Density Modulation) is a single-bit digital audio encoding used primarily as the output format for MEMS digital microphones. A PDM stream consists of a clock signal (CLK) driven by the host and a data signal (DATA) driven by the microphone, where the density of logic-high pulses represents the instantaneous amplitude of the audio signal. PDM microphones are found in smartphones, laptops, smart speakers, hearing aids, and IoT devices due to their small size and simple two-wire interface. Engineers debugging PDM interfaces need to verify clock frequency accuracy, confirm left/right channel selection via clock edge assignment, and validate that the pulse density pattern corresponds to the expected audio input.

PDM Quick Reference

type Serial, synchronous
signals CLK, DATA
max Speed Up to 4.8 MHz
voltage Range 1.8V – 3.3V
features Digital microphone interface

Acute Instruments Supporting PDM

Recommended Solutions

Recommended for Decode

TB3016F

TB3016F

With Analog Channels

MSO2116E

MSO2116E

With Electrical Validation

MSO3124V

MSO3124V

All Supporting Products

Protocol Decode
Hardware Trigger
Electrical Validation
Protocol Exerciser

MSO3000 Series

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How to Analyze PDM with Acute Instruments

1

Connect your Acute logic analyzer to the PDM CLK and DATA lines at the microphone or codec.

2

Attach a ground lead to the target board's ground reference.

3

In the Acute software, select the PDM protocol decoder and assign CLK and DATA to the correct input channels.

4

Configure the expected clock frequency and channel mapping (left on rising edge, right on falling edge, or vice versa).

5

Capture traffic and view the decoded PDM bitstream, verifying clock timing and data alignment for each audio channel.

Frequently Asked Questions

What sample rate do I need for PDM analysis?
PDM clocks typically run between 1 MHz and 4.8 MHz. Use a sample rate of at least 4x the PDM clock frequency — for a 3.072 MHz clock, sample at 12 MHz or higher. Higher sample rates improve timing accuracy when measuring clock duty cycle and data setup/hold times.
Why is my PDM microphone output showing no data transitions?
The most common cause is a missing or incorrect clock signal — PDM microphones are passive and only output data when clocked by the host. Verify the CLK signal is present and at the correct frequency. Also check power supply to the microphone, confirm the correct channel select pin state (some mics use a separate L/R select), and ensure the logic analyzer threshold matches the PDM signal voltage (typically 1.8V or 3.3V).
How many channels do I need for PDM analysis?
PDM requires 2 channels — one for CLK and one for DATA. A single DATA line can carry two channels of audio (left and right on opposite clock edges). If your design has multiple PDM microphone arrays with separate data lines, add one channel per additional DATA line.

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