TDM Protocol Support

Audio

Time Division Multiplexing

What is TDM?

TDM (Time Division Multiplexing) is a multi-channel audio transport scheme that carries multiple audio channels on a single serial data line by assigning each channel to a specific time slot within a repeating frame. TDM is used in professional audio systems, telecommunications equipment, audio DSP arrays, and multi-codec architectures where more than two audio channels must share a bus. The interface typically uses CLK, SYNC (frame sync), and one or more DATA lines, with frame sizes ranging from 2 to 32 or more time slots. Engineers debugging TDM buses need to verify time-slot assignments, frame sync alignment, clock accuracy, and data integrity across all active channels.

TDM Quick Reference

type	Serial, synchronous
signals	CLK, SYNC, DATA
max Speed	Up to 24.576 MHz
voltage Range	1.8V – 3.3V
features	Multi-channel audio

Acute Instruments Supporting TDM

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Protocol Decode

Hardware Trigger

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How to Analyze TDM with Acute Instruments

Connect your Acute logic analyzer to the TDM CLK, SYNC, and DATA lines.

Attach a ground lead to the target board's ground reference.

In the Acute software, select the TDM protocol decoder and assign each signal to the correct input channel.

Configure the number of time slots per frame, bit depth per slot, and frame sync polarity.

Capture and view decoded audio data for each time slot, verifying correct channel-to-slot mapping and frame alignment.

Frequently Asked Questions

What sample rate is needed for TDM analysis?

TDM bit clocks can be high — a 32-slot, 32-bit, 48 kHz TDM frame requires a 49.152 MHz bit clock. Sample at a minimum of 4x the TDM bit clock frequency. For a 24.576 MHz clock, use at least 100 MHz sampling. Acute logic analyzers with up to 2 GHz timing analysis handle even the fastest TDM configurations.

Why are some TDM time slots showing incorrect or missing audio data?

Incorrect slot data usually indicates a frame sync misalignment or an incorrect slot count configuration in either the decoder or the hardware. If the frame sync edge is not aligned with the expected first bit of slot 0, all subsequent slot boundaries will be shifted. Verify the frame sync polarity and delay settings, and confirm that both the transmitter and receiver agree on the number of slots and bits per slot.

How many channels do I need for TDM analysis?

TDM requires a minimum of 3 channels: CLK, SYNC, and DATA. If your design uses multiple data lines (e.g., one for each direction or to double the slot count), add one channel per additional data line. Most TDM configurations can be fully analyzed with 3 to 5 logic analyzer channels.

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I2S PCM

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